|Place of Origin:||China|
|Brand Name:||WITGAIN PCB|
|Minimum Order Quantity:||Negotiable|
|Delivery Time:||15 days|
|PCB Type:||HDI PCB||Layer Count:||6 Layer|
|Material:||FR4 S1000-2||Min Hole:||0.1MM|
|Min Line:||3/3Mil||Solder Mask:||Blue|
OSP HDI PCB Board,
6 Layer HDI PCB Board,
10Mil BGA HDI PCB Board
6 Layer HDI PCB With Blind And Buried Holes
PCB Type: HDI PCB(High Density Innterconnector)
Layer Count: 6 Layer
Material Type: FR4 S1000-2 S1000-2 DATA SHEET.pdf
Solder Mask: Blue
BGA Size: 10Mil
Unit Size: 140.86MM*108.71MM/2UP
Buried Holes: L2-L5 0.2MM
Blind Holes: L1-L2 0.1MM, L5-L6 0.1MM
Via Holes: L1-L6 0.2MM
Surface Treatment: OSP
Min Line: 2.8/3.6Mil
|1||Layer Count||1-24 Layers|
|3||Finished Board Max Size||700mm*800mm|
|4||Finished Board Thickness Tolerance||+/-10% +/-0.1(<1.0mm)|
|6||Major CCL Brand||KB/NanYa/ITEQ/ShengYi/Rogers Etc|
|7||Material Type||FR4,CEM-1,CEM-3,Aluminum,Copper, Ceramic, PI, PET|
|8||Drill Hole Diameter||0.1mm-6.5mm|
|9||Out Layer Copper Thickness||1/2OZ-8OZ|
|10||Inner Layer Copper Thickness||1/3OZ-6OZ|
|12||PTH Hole Tolerance||+/-3mil|
|13||NPTH Hole Tolerance||+/-1mil|
|14||Copper Thickness of PTH Wall||>10mil(25um)|
|15||Line Width And Space||2/2mil|
|16||Min Solder Mask Bridge||2.5mil|
|17||Solder Mask Alignment Tolerance||+/-2mil|
|19||Max Gold Thickness||200u'(0.2mil)|
|20||Thermal Shock||288℃, 10s, 3 times|
|22||Test Capability||PAD Size min 0.1mm|
|24||Surface Treatment||OSP, ENIG,HASL, Plating Gold, Carbon Oil,Peelable Mask etc|
Question: What is the Coefficient of Thermal Expansion (CTE) in a PCB?
Answer: The Coefficient of Thermal Expansion (CTE) specifies how much a printed circuit board will expand/contract when it is heated or cooled. The unit of CTE is PPM/°C i.e parts per million per Celsius degree. So lets assume a PCB is made out of FR4 which has a CTE of 17 (usually it is 14 to 17 ppm/°C). If the PCB is 1 Million inches long then it will expand by 17 inches for every 1 °C increase in temperature.
Every material has a different CTE. Copper has a CTE value of 18, on the other hand epoxy resin has a CTE value between 30-40. So, this CTE mismatch can create problems during the PCB manufacturing process as both materials will expand different amounts when subject to heat. During the assembly process and the whole PCB production cycle, a board goes through several thermal cycles and this difference in expansion rate can cause joint failures or delamination.
The difference in expansion rates between the substrate and copper can be cured by reinforcing woven glass cloth on the resin. It provides strength to the substrate material, and limits the expansion in the X-Y directions, resulting in the final CTE value around 17. This CTE value is nearly equal to the CTE value of copper. It is not acceptable for a material under thermal stress to expand in X or Y directions, but it must expand in the Z direction. In the Z direction, the CTE value changes to around 70 based on the material type and ratio of woven glass to the resin.
As the material heats up, it follows a linear expansion rate until it achieves the transition temperature (Tg). For temperatures higher than Tg, the material expands at a different rate, sometimes approaching a CTE value of 400. CTE is very important for parts where metal joins to the epoxy resin.
The difference in CTE values for two materials being used on a board should be as low as possible. A laminate which expands more with high temperature than copper can use the copper traces or vias to break. The difference in CTE value should be maintained to a minimum along the vertical axis of the board as it is that direction along which chances of expansion are higher.
CTE also comes in to play when using large silicon chip packages that are soldered on to a board. The chip packages usually have a CTE of about 6 ppm/°C which is lower than the CTE of the PCB. When the board is heated the package will expand less than the board and can result in a bad solder joint connection which will hamper the performance of the circuit. The difference in CTE will matter more when the chip package sizes are large.
The difference in CTE between the PCB board and the IC packages used on it can be lowered by using metal, Kevlar and Aramid cores along with FR-4. The metal cores used are copper-invar-copper (CIC) and copper-molybdenum-copper (CMC), which are typically 6 mils thick. The copper on the outside of the metal core allows for lamination onto the normal FR-4 prepregs and cores.
How to Avoid Higher CTE values:
In addition to controlling CTE values, it is also advised to use metal core PCBs to suffice the requirement of high heat transfer. Carbon composite laminates (CCL) are also used for CTE control.
Contact Person: Steven